A transfer method known from the state of the art, described in U.S. Pat. No. 6,562,127 B1 and shown in FIG. 1 comprises the steps:                a. providing an intermediate substrate 1, the intermediate substrate 1 comprising, on one of its faces, blocks 2 assembled according to a first main face 3 to the intermediate substrate 1, the blocks 2 having a free surface 4 opposite to the first main face 3, and comprising a monocrystalline material, the blocks 2 comprising an embrittlement area 5, the embrittlement area 5 and the free surface 4 of each block 2 delimiting a block portion 7 intended to be transferred onto a final substrate 6;        b. executing an assembling step by putting the free surface 4 of each of the blocks 2 in contact with the final substrate 6; and        c. executing detachment at the embrittlement area 5 of each of the blocks 2 so as to transfer the block portion 7 of each of the blocks 2 onto the final substrate 6.        
By “block” is meant an entity comprising two substantially parallel main faces, both parallel faces of block 2 being connected through a lateral surface. Both main faces of the block 2 may have any possible shapes, including regular shapes and irregular shapes.
At the end of the transfer method, the block portions 7 are transferred onto the final substrate 6 as illustrated in FIG. 2.
The surface of the final substrate 6 is thus covered with block portions 7 on which devices for microelectronics, photonics, optronics, and photovoltaics may be fabricated.
The blocks 2 may comprise parallel faces with a square, rectangular, hexagonal, polygonal, or circular shape, for example, and may be positioned regularly, for example, as a grid or array, on the intermediate substrate 1. Therefore, the block portions 7 may also be positioned regularly on the final substrate 6.
This transfer method is of particular interest when the material making up the blocks 2 can only be formed as substrates with an insufficient size (small diameter) with respect to the considered industrial application.
Notably, indium phosphide (InP) substrates are only presently available as a substrate with a diameter of 100 mm. The use of such InP substrates in existing production lines of circuits on a 200 mm substrate is simply impossible.
Depending on the relevant material, and with respect to the maturity of the market for the corresponding material, the limiting size changes over time. For example, for silicon, it is currently at 300 mm.
The list of materials of interest for resorting to such a method notably comprises: SiC, GaN, InP, GaSb, GaP, InAs, Ge, ZnO, LiTaO3, LiNbO3, diamond, sapphire, MgO, CeO2, YSZ, SrTiO3, BaTiO3, and LaAlO3, for example.
This list may also contain materials surely available with a large diameter, generally, but not according to certain characteristics or specifications. Silicon, for example, is actually available today with a diameter of 300 mm, but it cannot be obtained at this diameter with an ingot growth technique of the molten zone type, which would only allow excessively low residual oxygen contents.
One or several small size substrates may be cut out into blocks 2.
The blocks 2 are then assembled to an intermediate substrate 1.
Finally, the block portions 7, as defined in the method described in U.S. Pat. No. 6,562,127 B1, are transferred on a final substrate 6. The final substrate 6 may have any size and shape.
Thus, it is possible to transfer block portions 7 of a given material onto a circular substrate with a size greater than 200 mm in diameter, or even greater than 300 mm in diameter, regardless of the size of the substrate from which are formed the blocks 2.
This technique is all the more interesting since, for reasons of costs, manufacturers of microelectronic, optronic, and photonic devices increasingly tend to manufacture the devices on substrates with a size greater than 200 mm in diameter, or even greater than 300 mm in diameter.
However, this method is not satisfactory.
Indeed, in order to ensure assembling of all the blocks 2 on one of the faces of the final substrate 6, it is necessary to proceed with a chemical-mechanical polishing step or a dual-face polishing step so as to make the free surfaces 4 of the blocks 2 coplanar.
Indeed, the blocks 2 generally have different thicknesses (the thickness of a block 2 being defined as the distance between its two parallel faces).
As illustrated in FIG. 1, the differences in the thicknesses of the blocks 2 assembled on an intermediate substrate 1 makes the assembling step of putting the free surface 4 of each of the blocks 2 in contact with the final substrate 6 impossible, and the thinner blocks 2 cannot adhere to the surface of the final substrate 6. Moreover, certain blocks 2 can only contact and adhere to the final substrate 6 on only a portion of their surface (e.g., the thickest portion). Any localized excessive thickness in the blocks 2 is problematic for this reason.
The planarization step, by chemical-mechanical polishing or dual-face polishing can overcome this problem.
The planarization step inevitably affects the yield of the transfer method.
Moreover, the planarization step may degrade the free surface 4 of the blocks 2.
Further, the planarization step may generate additional cost for the transfer method, and the increased cost may be high since the relevant material may be difficult to polish, like SiC, for example.